1. Field of the Invention
The present invention relates to a semiconductor testing device and, for example, to a semiconductor testing device for testing a memory of a data storage type the quality of which is controlled blockwise if a device is good or not such as a NAND-type flash memory.
2. Related Art
A semiconductor memory testing device has a timing generator, a pattern generator, a pattern formatter, and a logic comparator. The timing generator generates a reference clock from timing data designated by a timing set signal (hereinbelow, called TS signal) output from the pattern generator. The pattern generator outputs test pattern data to be given to a memory under test (MUT) synchronously with the reference clock from the timing generator. The test pattern data is given to the pattern formatter. The pattern formatter shapes the test pattern data to a waveform of a timing necessary for a test, and applies the shaped test signal to the memory under test. A result signal output from the memory under test is supplied to the logic comparator. The logic comparator compares expectation value data from the pattern generator and the result signal from the memory under test to determine whether the memory under test is good or not on the basis of the result of comparison.
In recent years, as the packing density of a semiconductor memory increases, various problems occur in the semiconductor memory. To solve the problems early, analysis is conducted from a wafer fail bitmap or the like at a wafer level. The wafer fail bitmap is generated from pass/fail data of a device at a wafer process stage stored in an AFM (Address-based Failure Memory). Since the amount of the data is large (for example, 1 Gbit or larger), usually, the semiconductor testing device obtains the failure data of a device at the wafer process stage from the AFM, compresses the data, and stores the compressed data into a CFBM (Compression Fail Buffer Memory). The compressed data is used to generate a wafer fail bitmap and test a semiconductor memory.
However, as the capacity of a semiconductor memory increases, the data compression time is becoming longer. A problem arises such that the period since data is read from the AFM until compressed data is stored in the CFBM is becoming longer.